代表的な論文

ウィキペディア小見出し辞書

代表的な論文

出典: フリー百科事典『ウィキペディア（Wikipedia）』 (2022/05/02 04:44 UTC 版)

「吉川恒夫」の記事における「代表的な論文」の解説

（可操作性） “Analysis and Control of Robot Manipulators with Redundancy”. Preprint of First International Symposium of Robotics Research: 735-747. (1983). 「ロボットアームの可操作度」『日本ロボット学会誌』第2巻第1号、1984年、 63-67頁。 “Manipulability of Robotic Mechanisms”. The International Journal of Robotics Research 4 (2): 3-9. (1985). https://doi.org/10.1177/027836498500400201. （動的可操作性） “Dynamic Manipulability of Robot Maipulators”. Journal of Robotic Systems 2 (1): 113-124. (1985). “Erratum to “Dynamic Manipulability of Robot Manipulators””. Journal of Robotic Systems 17 (8): 449. (August 2000). doi:10.1002/1097-4563(200008)17:8<449::AID-ROB5>3.0.CO;2-M. 「ロボットアームの動的可操作性」『計測自動制御学会論文集』第21巻第9号、1985年9月、 970-975頁。 （動的ハイブリッド制御） 「ロボットアームの位置と力の動的ハイブリッド制御－手先拘束の記述と関節駆動力の算出－」『日本ロボット学会誌』第3巻第6号、1985年、 531-537頁。

代表的な論文

出典: フリー百科事典『ウィキペディア（Wikipedia）』 (2021/04/11 00:28 UTC 版)

「エヴィ・ネメス」の記事における「代表的な論文」の解説

Nemeth, E., Hein, T., Snyder, G., and Whaley, B., Unix and Linux System Administration Handbook, Prentice Hall, 2010. Brownlee, N.; Claffy, K. C.; Nemeth, E. (2001). “DNS measurements at a root server”. GLOBECOM'01. IEEE Global Telecommunications Conference (Cat. No.01CH37270). 3. pp. 1672. doi:10.1109/GLOCOM.2001.965864. ISBN 978-0-7803-7206-1 Broido, A.; Nemeth, E.; Claffy, K. (2002). “Internet expansion, refinement and churn”. European Transactions on Telecommunications 13: 33–51. doi:10.1002/ett.4460130105. Mullin, R., Nemeth, E. and Weidenhofer, N., "Will Public Key Crypto Systems Live up to Their Expectations? HEP Implementation of the Discrete Log Codebreaker", Proc. of the 1984 Intl Conf on Parallel Processing, Aug. 21–24, 1984, pp. 193–196. Selected for the best paper award for this conference. “Otter: A general-purpose network visualization tool”. International Networking Conference (INET) '99. (June 1999). http://www.caida.org/publications/papers/1999/otter/ 2013年6月28日閲覧。.

代表的な論文

出典: フリー百科事典『ウィキペディア（Wikipedia）』 (2020/03/25 02:36 UTC 版)

「五日市剛」の記事における「代表的な論文」の解説

執筆した学術論文は50以上あるが、その中で最も代表的なものは下記の通り。 "Plasma Spray Joining of Al-Matrix Particulate Reinforced Composites" Welding Journal,(1993) "Characterization and Consolidation of Mechanically Alloyed Ni50Ti50 Powder Mixtures" Materials Science and Technology,(1993) "Mechanical Alloying of Al-Ti Powder Mixtures and their Subsequent Consolidation" Journal of Materials Research,(1993) "Phases Produced in Mechanically Alloyed Powders of Al-Ni-Ti" Scripta METALLURGICA et MATERIALIA,(1994) "Mechanically Alloyed Ni50Ti50 and its Transformation by Thermal Treatments" Journal of Materials Science,(1994)

代表的な論文

出典: フリー百科事典『ウィキペディア（Wikipedia）』 (2022/07/06 22:47 UTC 版)

「榎本忠儀」の記事における「代表的な論文」の解説

光誘起伝導[01] “Relation between IR Induced Photo-conductivity and IR Stimulated Luminescence in ZnS”, Solid-State Electrics，Pergamon Press, vol. 19, no. 10, pp. 883-890, Oct. 1976. 集積回路製造技術[02] “Fabrication process, experimental results and application for an elemental level vertically integrated circuit (ELVIC)”, Material Research Society, J. of Materials Research， vol. 1, no. 4, pp. 552-559, Aug. 1986. アナログ集積回路[03]「集積化アナログ自動等化器」、電子情報通信学会、論文誌、vol. J65-C、no. 11、pp. 937-944、1982年11月。 [04] “Single-chip adaptive transversal filter IC employing switched capacitor technology”, IEEE, J. of Selected Areas in Communications, SAC-2, no. 2, pp. 324-333, Mar. 1984. ディジタル集積回路[05] “A 200-MHz 16-bit super high-speed signal processor (SSSP) LSI”, IEEE, J. of Solid-State Circuits, vol. SC-24, no. 6, pp.1668-1674, Dec. 1989. [06] “A 200-MFLOPS 100-MHz 64-b BiCMOS vector-pipelined processor (VPP) ULSI”, IEEE, J. of Solid-State Circuits, vol. SC-26 no. 12, pp. 1885-1893, Dec. 1991. [07] “A 2K-word dictionary search processor (DISP) LSI with an approximate word search capability”, IEEE, Jour. of Solide-State Circuits, vol. 27, no. 6, pp. 883-891, June 1992. 動画像符号化プロセッサ[08] “A micro programmable realtime video signal processor (VSP) LSI”, IEEE, J. of Solid-State Circuits, vol. SC-22, no. 6, pp. 1117-1123, Dec. 1987. [09] “A micro programmable real-time video signal processor (VSP) for motion compensation”, IEEE, J. of Solid-State Circuits, vol. SC-23, no. 4, pp. 907-915, Aug. 1988. [10] “250-MHz BiCMOS super-high-speed video signal processor (S-VSP) ULSI”, IEEE, J. of Solid-State Circuits, vol. SC-26, no. 12, pp. 1876-1884, Dec. 1991. [11] “A 300-MHz 16-b BiCMOS video signal processor”, IEEE, Jour. of Solid-State Circuits, vol. 28, no. 12, pp. 1321-1330, Dec. 1993. [12] “(Invited Paper) High-throughput technologies for video signal processor (VSP) LSIs”, IEICE, Tran. on Electronics, vol. E79-C, no. 4, pp. 459 - 471, April 1996. [13]「(招待論文) 動画像符号化プロセッサの歴史と将来展望」電子情報通信学会、論文誌(エレクトロニクス)、vol. J92-C、no. 8、エレクトロニクスソサイエティ和文論文誌500号記念論文特集、pp. 477-487、2009年8月。 動画像符号化アルゴリズム[14] “Fast motion estimation algorithm and low power CMOS motion estimator for MPEG encoding”, IEICE, Tran. on Electronics, vol. E86-C, no. 4, pp. 535 - 545, April 2003. [15] “A multiple block-matching Step (MBS) algorithm for H.26x/MPEG4 motion estimation and a low-power CMOS absolute differential accumulator circuit”, IEICE, Tran. on Electronics, vol. E90-C, no. 4, pp. 718-726, April 2007. [16] “Stick-Shaped Window Search (SSWS)” Block Matching Algorithm for Motion Vector Estimation”, Proc. of 2010 IEEE Int. Conference on Signal Processing (ICSP’2010), pp. 1117-1120, Beijing, China, Oct. 2010. [17] “A low power multimedia processor implementing dynamic voltage and frequency scaling technique and fast motion estimation algorithm called “adaptively assigned breaking-off condition (A2BC)”, IEICE, Tran. on Electronics, vol. E96-C, no. 4, pp. 424-432, April 2013. 集積回路の低電力化技術[18] “A self-controllable voltage level (SVL) circuit and its low-power, high-speed CMOS circuit applications”, IEEE, Jour. of Solid-State Circuits, Vol. 38, no. 7, pp. 1220 - 1226, July 2003. [19] “Clock driver design for low-power high-speed 90-nm CMOS register array”, IEICE, Tran. on Electronics, vol. E91-C, no. 4, pp. 553-561, April 2008. [20] “Low dynamic power and low leakage power techniques for CMOS square-root circuit”, IEICE, Tran. on Electronics, vol. E92-C, no. 4, pp. 409-416, April 2009. [21] “Development of a low standby power six-transistor CMOS SRAM employing a single power supply”, IEICE, Tran. on Electronics, vol. E101-C, no. 10, pp. 822-830, Oct. 2018. [22] “Low Standby Power CMOS Delay Flip-flop with Data Retention Capability”, Proc. of 2019 IEEE Asia and South Pacific Design Automation Conference (ASP-DAC’2019), Design Contest, 1A-11, pp. 21-22, Tokyo, Japan, Jan. 2019.